Quantum computations are expressed in general as quantum circuits, which arespecified by ordered lists of quantum gates. The resulting specifications areused during the optimisation and execution of the expressed computations.However, the specification format makes it is difficult to verify thatoptimised or executed computations still conform to the initial gate listspecifications: showing the computational equivalence between two quantumcircuits expressed by different lists of quantum gates is exponentially complexin the worst case. In order to solve this issue, this work presents aderivation of the specification format tailored specifically for fault-tolerantquantum circuits. The circuits are considered a form consisting entirely ofsingle qubit initialisations, CNOT gates and single qubit measurements (ICMform). This format allows, under certain assumptions, to efficiently verifyoptimised (or implemented) computations. Two verification methods based onchecking stabiliser circuit structures are presented.
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